1. Field of the Invention.
The present invention relates to a method of manufacturing a semiconductor device wherein a junction distance between two semiconductor regions can be decreased.
2. Description of the related art.
In a semiconductor device such as a bipolar transistor and a memory, a junction distance between adjacent semiconductor regions must be decreased to decrease a junction resistance, or the depth of each semiconductor region must be decreased in order to enable a high-speed operation.
A junction distance is a distance between an emitter and a base in the case of a bipolar transistor. The depth of a semiconductor region is the thickness of a semiconductor region such as an emitter.
In order to decrease the junction distance, the following methods are available:
(1) According to a first method, silicon oxide film 32 is washed out by using patterned silicon nitride film 31 as a mask, thereby forming contact hole 33, as shown in FIG. 1.
(2) FIGS. 2A to 2C show the process of a second method.
According to the second method boron in a Borosilicate Glass (BSG) is thermally diffused by using patterned silicon nitride film 41 as a mask, thereby forming p.sup.+ -type layer 42 (FIG. 2A).
LOCOS oxide film 43 is formed by using silicon nitride film 41 as a mask. Arsenic and boron are ion-implanted and thermally diffused to form a emitter region as a n.sup.+ -type layer, base region as an p.sup.- -type layer (FIG. 2B).
Finally, LOCOS oxide film 43 is selectively etched and silicon nitride film 41 is washed out to form contact hole 44 (FIG. 2C).
(3) FIGS. 3A to 3C show a third method. According to the third method, prospective contact hole 51 is formed by patterning, and diffusion layer 52 is formed. The resultant hole is used as contact hole 51.
(4) FIG. 4 shows a fourth method. According to the fourth method, arsenic-doped polisilicon layer 61 and boron-doped polisilicon layer 63 also serving as a diffusion source is used as wirings of an emitter and a base. A junction distance is determined by oxide film 62 sandwiched between polisilicon layers 61 and 63.
However, the conventional methods described above have the following problems:
(1) With the method shown in FIG. 1, since the size of contact hole 33 is determined by patterning precision of silicon nitride film 31, a decrease in junction distance is limited.
(2) With the method shown in FIGS. 2A to 2C, since the junction distance is determined by LOCOS oxide film 43, the junction resistance can be greatly reduced. However, a defect in the edge of film 43 adversely affects the element characteristics. Oxidation as a high-temperature annealing undesirably changes the diffusion profile. In addition, ion implantation through silicon nitride film 41 changes the film quality of film 41.
(3) With the method shown in FIGS. 3A to 3C, diffusion layer 52 is formed by ion implantation into a resist block on a silicon substrate. Therefore, it is difficult to completely remove the photoresist after ion implantation, and the element characteristics and reliability are thus degraded.
(4) With the method shown in FIG. 4, it is difficult to etch polisilicon layer 63 on the silicon substrate. This leads to a degradation in the interface between the substrate and electrode.
As described above, with the conventional methods of manufacturing a semiconductor wherein a junction distance between semiconductor regions is decreased, a sufficiently small junction distance cannot be set. Even if it can be set, element characteristics are degraded.